# ** Error: (vlog-7) Failed to open design unit file "C:/intelFPGA/18.0/quartus/eda/sim_lib/altera_primitives.v" in read mode. # vlog -reportprogress 300 C:/intelFPGA/18.0/quartus/eda/sim_lib/altera_primitives.v -work altera_ver # Model Technology ModelSim - Intel FPGA Edition vlog 10.6c Compiler 2017.07 Jul 26 2017 # FORCE_MODELSIM_AE_SELECTION - Set to true to force to select Modelsim AE always. # SILENCE - Set to true to suppress all informational and/or warning messages in the generated simulation script. # USER_DEFINED_ELAB_OPTIONS - User-defined elaboration options, added to elab/elab_debug aliases. # USER_DEFINED_VERILOG_COMPILE_OPTIONS - User-defined verilog compile options, added to com/dev_com aliases. # USER_DEFINED_VHDL_COMPILE_OPTIONS - User-defined vhdl compile options, added to com/dev_com aliases. # USER_DEFINED_COMPILE_OPTIONS - User-defined compile options, added to com/dev_com aliases. # QUARTUS_INSTALL_DIR - Quartus installation directory. # QSYS_SIMDIR - Qsys base simulation directory. # SYSTEM_INSTANCE_NAME - Instantiated system module name inside top level module. # For most designs, this should be overridden # TOP_LEVEL_NAME - Top level module name. # ld_debug - Compile all the design files and elaborate the top level design with -novopt # ld - Compile all the design files and elaborate the top level design # elab_debug - Elaborate the top level design with novopt option # com - Compile the design files in correct order # file_copy - Copy ROM/RAM files to simulation directory Modelsim reports: Modelsim> VHDL 2008 do tb_run.tcl => dev_com, this is line 29, here the error occurs, see below Source $SETUP_SCRIPTS/mentor/msim_setup.tcl Set QUARTUS_INSTALL_DIR "C:/intelFPGA/18.0/quartus" # there is something wrong with the rootdir, so i changed to the row # set QUARTUS_INSTALL_DIR "$env(QUARTUS_ROOTDIR)" => initially i thought I get the same error! What could be wrong? At start of tb_run.tcl (run from commandline MODELSIM> VHDL 2008 do tb_run.tcl), this tb_run.tcl file is generated by quartus example global env Then i tried a modelsim project i used earlier, which used to work. No such file or directory (errno = ENOENT). It reports 'error (vlog-7) failed to open unit file "blabla" in read mode. try this convert_hex2ver.I am trying to run an example design by IntelFPGA, using a tcl script provided by Intel. If ModelSim starts the memory content with zeroes, try this: Now you'll get rid of this 'altsyncram failed' message. hex in ModelSim work directory (type pwd). mif, so you have to open it in QuartusII and save as. just click on Simulate > Start Simulation > Libraries. If you are using Verilog you have to add the altera_mf_ver library, if you are using VHDL you have to use altera_mf library. try this convert_hex2ver.dll approach:
#Modelsim altera 18 full
replace the relative path to the full path of your. If you are using Verilog you have to add the altera_mf library, if you are using VHDL you have to use altera_mf_ver library. # ** Warning: (vsim-3010) - Module 'rom1' has a `timescaleĭirective in effect, but previous modules do not.
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